1. Field of the Invention
This invention relates generally to the synthesis of circuit designs and more particularly to a mechanism in the synthesis procedure that permits the insertion of elements into the circuit design.
2. Description of the Related Art
Many hardware description languages allow for simple textual description of logic design connectivity. These languages typically use infix notation for generic boolean and arithmetic operators and have an unordered pin/signal format for complex structures.
Referring next to FIG. 1, the procedure for synthesizing a logic circuit design according to the prior art is shown. Model definition data structures from a library of component definitions are entered into the data structures associated with the synthesis data base in step 11. In step 12, the information related to the instances of the circuit design, including the connectivity information, is entered in the data base. The instances of the circuit design are generally in a behavioral or functional form when entered in the synthesis data base. The synthesis procedure relates the instances of the circuit design to the model instances in step 13. In step 14, a set of rules for the synthesis procedure is applied to each of the model instances and the model instances are altered and connected in such a way as to maximize certain parameters such as size, path delay, power, etc. In step 15, the resulting circuit design is placed in a format that can control the automated fabrication of the circuit.